SiC MOSFET逆变器分段调制死区补偿策略 |
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引用本文:柏树根1,孙承晨2,张新松1,张雷1,郑一专1.SiC MOSFET逆变器分段调制死区补偿策略[J].电网与清洁能源,2023,39(10):28~37 |
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基金项目:江苏省自然科学基金项目(BK20200969);江苏省高等学校基础科学研究重大项目(22KJA470006);江苏省高等学校基础科学(自然科学)研究项目(22KJB470025) |
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中文摘要:为了避免逆变器在运行过程中出现桥臂直通问题,器件的驱动时序中需要插入必要的死区时间。然而,死区会带来逆变器基波电压损失与畸变等问题。尤其当采用SiC MOSFET作为开关器件时,较高的开关频率使得波形畸变更严重,这使得传统应用于Si IGBT逆变器的死区补偿策略已经无法适用。为此,在传统死区消除策略的基础上,提出一种分段调制死区补偿策略。该策略通过建立的预测模型得到过零点处的电流纹波值,并以此划分电流过零区域和非过零区域。当输出电流处于非过零区域时,每相桥臂仅对有效器件进行开关动作,互补器件处于关断状态,以提高基波电压幅值;当处于过零区域时,针对死区时间、寄生电容等因素产生的误差,计算出等效脉冲补偿时间用于补偿误差电压,减少波形畸变。最后,仿真与实验结果证明了该补偿策略相较于传统的死区消除策略可减少低次谐波含量,改善输出波形质量,输出电压的THD可减少1.63%。 |
中文关键词:逆变器 SiC MOSFET 死区时间 |
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The Dead-Time Compensation Strategy for Segmented Modulation of the SiC MOSFET Inverter |
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Abstract:To prevent the shoot-through of the phase leg from happening in the operation of the inverter, the necessary dead-time should be inserted into the driving signals of the devices. However, the dead-time could cause issues such as fundamental voltage loss and distortion in the inverter. Especially when the SiC MOSFET is used as the switching device, the high switching frequency makes the waveform distortion more serious, therefore the traditional dead-time compensation strategy applied to the Si IGBT inverter is inadequate and inapplicable anymore. To this end, this paper proposes a novel dead-time compensation strategy for piecewise modulation of the SiC MOSFET inverters, which is based on the traditional dead-time elimination strategy. This strategy derives the current ripple value at the zero-crossing point through the established prediction model, and divides the current into zero-crossing area and non-zero-crossing area with the derived value. When the output current is in the non-zero-crossing region, only the effective devices are switched by each phase of the bridge arm and the complementary devices are in off-state, which can increase the amplitude of the fundamental voltage. When the current is in the zero-crossing region, the equivalent pulse compensation time is calculated to compensate for the errors caused by factors such as dead time and parasitic capacitance, which can reduce waveform distortion. Finally, the simulation and experimental results show that compared with the traditional dead-time elimination strategy, the proposed compensation strategy can reduce the low-subharmonic content, improve the output waveform quality and reduce the THD of the output voltage by 1.63%. |
keywords:inverter SiC MOSFET dead-time |
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